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Prof.P.Chandra Sekhar
Vice Principal
  • Designation:
    Professor, Department of Electronics and Comm. Engg., University College of Engineering, Osmania University, Hyd- 500 007
  • Email:,
  • Phone:

    (O) +9140-27098213, (R) +91-40-27426784,(R) +91-9866695963

Brief Bio-data of Prof. P.Chandra Sekhar, Vice Principal, University College of Engineering, OU

Prof. Chandra Sekhar Paidimarry received BE degree from Nagpur University, M.Tech degree from JNTU Hyderabad and PhD from Osmania University in 1991, 1999 and 2009 respectively. He had been awarded with Post Doctoral Fellowship by Shizuoka University, Japan for one year. Prior to joining in teaching, he has eight years of industrial experience of design and development of Embedded Systems. He has been working in the Department of Electronics and Communication Engineering, University College of Engineering, Osmania University, Hyderabad from 2001. He has been elevated as Professor of ECE in 2015. He is served as Head of Department, ECE, Osmania University. He served as Chairman BOS in ECE Department for two years. He is actively involved in establishing the state of art Laboratories in the Department. He has more than 50 research publications to his credit. He delivered more than 15 invited talks and guest lecturers in various conference and events. Presently eight Ph.D. students are pursuing their research under his guidance. UGC sanctioned a Major Research Project on GNSS Receiver: Baseband algorithms in FPGA, worth of Rs. 15 Lakh. He received a consultancy project from DLRL worth of 10 Lakh. . He Received another Consultancy project from RCI, “Multi Communication protocols for SDR Appliactions” worth of Rs. 10 lakh.He is currently Principal Investigator for CSIR SRF scheme. He is currently serving as Peer review committee member of DLRL projects and Member, System Engineering, BDL. He is member of Board of Studies in several Engineering colleges. His research interests include Development of high performance Computational Electro-magnetic and efficient FPGA based signal processing algorithms and Design Automation.